This lab aims to implement simple logic circuits. The software used is Log.ly The focus is to learn how to design the circuits, find the truth table for the gates, and simulate the combination of gates.
When you start Logic Friday, a blank canvas screen is provided for defining circuits.
There is a menu for handling project-specific tasks such as creating new diagrams and file management. To create a new logic gate diagram select File, New, and the Gate Diagram.
This will open the logic gate components window at the bottom-right of the main window.
The components we can create are:
We will now examine the truth table for an AND gate.
Your diagram should look something like this:
Now, click the Submit button on the Components Window. The logic diagram will be analysed and the equation and truth table generated. Your screen will look something like this:
At the moment, only the 1 (true) outputs are shown on the truth table on the left. In the menu, select Truthtable then Show all rows. The full truth table will be shown.
Above the canvas, the function equation is shown. This is:
F0 = A B;
An AND gate is sometimes represented by multiplication (e.g., A B) rather than with the logical and symbol. An OR gate is sometimes represented by a plus (e.g., A + B) rather than with the logical or symbol. This does not matter for this lesson. We are only concerned with gates and truth tables.
We can edit the gate diagram by clicking Gates then Modify Gate Diagram. Now perform the following steps:
Your diagram should be:
Let us draw the logic circuit for the following:
\[f = A \lor C \lor ¬B\]We will need two 2-in OR gates and one NOT gate (Invertor).
Your diagram should look something like this:
Click Submit, then Truthtable, Show all rows to analyse the diagram. It should be the same as:
A | B | C | => | F0 |
---|---|---|---|---|
0 | 0 | 0 | 1 | |
0 | 0 | 1 | 1 | |
0 | 1 | 0 | 0 | |
0 | 1 | 1 | 1 | |
1 | 0 | 0 | 1 | |
1 | 0 | 1 | 1 | |
1 | 1 | 0 | 1 | |
1 | 1 | 1 | 1 |
Implement the following logical expressions and derive their truth tables.